Achieving the objectives of miniaturization and higher packing densities continue to drive the semiconductor manufacturing industry toward improving semiconductor processing in every aspect of the fabrication process. One such aspect of the semiconductor fabrication process is subtractive metallization or metal etch processes. Metallization typically refers to forming metal layers, whereas subtractive metallization typically refers to removing metal to form conductive lines, interconnects, contact holes and plugs. In addition, subtractive metallization can also involve etching or chemical mechanical polishing (CMP) of the metal material in order to obtain desired thicknesses and structures. The CMP process removes or planarizes selected portions of the metal material. In both the metal etch and polishing processes, conventional endpoint detection techniques are often used to determine when the etch or polish is completed in order to prevent malformation of the desired structure or feature on the wafer. For example, prior art FIGS. 1–3 and 4–6 demonstrate malformed features on the wafers resulting from a metal etch process and a CMP process, respectively, wherein conventional endpoint detection techniques are employed.
FIGS. 1–3 illustrate a wafer 10 undergoing a metal etch process whereby the metal layer 12 which is formed over a substrate 14 is exposed to etch components 16. The resulting wafer structure 20 reveals incompletely etched conductive lines 22. In other words, metal material 24 continues to undesirably exist between the conductive lines 22. This excess metal material 24 may disform the wafer structure and impair proper semiconductor function.
Likewise, incomplete polishing of a metal material can also result in ineffective semiconductor function. FIGS. 4–6 illustrate a metal layer 32 formed over a series of trenches 34 between a dielectric material 31 on a substrate 30. The metal layer 32 undergoes a CMP process 36 to remove excess metal material, leaving metal only in the trenches (FIG. 5). However, incomplete polishing 38 resulting from faulty endpoint detection methods such as that shown in FIG. 6 can render the device inoperable or impaired. Thus, it is crucial to the operability of semiconductor devices to minimize insufficient or excessive processing of the wafer.
Conventional endpoint detection techniques are problematic for several reasons. For instance, they often are based on past wafer characteristics. Such methods cannot account for wafer to wafer structural and layer variations which commonly exist. As a result, conductive lines, interconnects, contacts holes and/or plugs are malformed and defective, causing device failure and decreased product yield as well as varying wafer-to-wafer quality. Although some damaged wafers may be repaired, such repairs delay manufacturing, increase production costs and decrease product reliability.
In addition, conventional endpoint detection methods do not provide real time information relating to the current etch or polishing process.
In light of these problems, there is an unmet need for a monitoring system which may provide improved feature formation and endpoint detection.